1. Field of the Invention
This invention relates to a semiconductor device and a method for producing the semiconductor device, and more particularly, is applicable to a TCP (tape carrier package).
2. Description of the Related Art
In recent years, a high-density mounting technology of electronic parts on a circuit board has been achieved, with the miniaturization of electronic components.
For example, as a mounting method for mounting, an IC chip on a board, as shown in FIG. 1, the method is widely used wherein each electrode of an IC chip 1 is connected to the corresponding lead terminal 3 via a gold wire 2, etc. The IC chip 1 and the base portion of each lead terminal 3 are molded integrally with a resin 4, so that a semiconductor package 5 (for instance, QFP (quad flat package)) is formed, and then the tip portion of each lead terminal 3 of the semiconductor package 5 is bonded to the corresponding electrode of the board (not shown) by solder, etc.
However, in this mounting method, the surrounding resin 4 (package), which protects the IC chip 1 from the external environment, is large in comparison with the size of the IC chip which is the mounting object, hence there have been such problems that the whole mounting area becomes so large that it is not suited to high-density mounting.
Therefore in recent years, in order to realize high-density mounting, the method has been proposed and implemented wherein an uncovered IC chip is mounted on the board without molding (hereinafter, this is referred to as the bear-chip mounting method).
The a bear-chip mounting method, includes the TCP (tape carrier package) mounting method, and the flip chip (F/C) mounting method, etc. For instance, in the TCP mounting method, an IC chip is mounted on the board according to the following procedure.
That is, as shown in FIGS. 2A and 2B, at first a lead 11 which is comprised of a copper leaf (for instance, about 30 .mu.m thick) is formed on a film tape 10 made from polyimide, etc. with the stated pattern, and then an inner portion of each lead 11 (inner lead) is bonded to the corresponding electrode of the IC chip 1 via a bump which has been made of tin (Sn) or gold (Au), etc., and then the circuit side 1A of the IC chip 1 is sealed with silicone resins 12, etc., hereby the so-called TCP 13 is formed.
Subsequently, forming of the TCP 13 into the gull-wing shape is performed by bending the tip portion of each lead 11 (outer lead) into the ladle shape, as shown in FIG. 3B, utilizing the forming metal-molds 20A and 20B shown in FIG. 3A, and the excessive tape is cut off. Then, as shown in FIG. 3C, the tip portion of each lead 11 is bonded (outer lead bonding: OLB) on the corresponding land 22 of the board 21 by thermo-compression bonding, etc.
The TCP mounting method like this has the advantages such that the circuit side 1A of the IC chip 1 which generates heat during operation is not opposed to the board 21 but mounted to face upward, hence the thermal radiation property is sufficient. Also, a pad of the IC chip 1 is connected to the corresponding land 22 of the board 21 via a lead 11 (copper leaf) of the TCP 13 which has elasticity and thickness of about 30 .mu.m, therefore stress which is owing to the difference between the thermal expansion coefficients can be decreased so that reliability during the heat-cycle is increased.
The F/C mounting method is implemented in such a way that a bump 25 is formed on each pad 1B of an IC chip 1 with solder, gold (Au). As shown in FIG. 4A, these bumps 25 are respectively aligned with the corresponding lands 27 of a board 26 and then mounted to those face-down. Then each bump 25 is exposed to reflowing so that each bump 25 of the IC chip 1 is bonded to the corresponding land 27 of the board 26 as shown in FIG. 4B, then sealing resin 29 is streamed into the gap 28 between the IC chip 1 and the board 26 and hardened, as shown in FIG. 4C. Thus, the F/C mounting method has the advantage such that the mounting area for the IC chip 1 may be merely the size of the IC chip 1 itself, therefore high-density mounting can be performed.
Additionally, as a method for mounting IC chips 1 on the board with much higher density, the method is frequently utilized wherein the IC chip 1 is packaged to the form of ceramic chip carrier (LCCC) or the form of plastic chip carrier (PLCC) which are smaller than the plastic QFP. Lead terminals 32 and 34 of these are placed respectively on the sides of the parts, as shown in FIGS. 5A and 5B. For instance, a LCCC 30 is formed by bonding the IC chip 1 to a carrier 33 of a board of ceramic using the wire bonding method, etc., and a PLCC 31 is formed by sealing the IC chip 1 with molding material similar to a plastic QFP.
However, the TCP mounting method has had the problems such that the IC chip 1 is bonded to the film tape 10, hence the mounting area becomes larger than the size of the IC chip itself, as can be seen in FIGS. 3A to 3C. Therefore it is not suited to high-density mounting, and each lead 11 is very thin so that it is very week to external force and apt to be deformed, bended, or cut.
The TCP mounting method also had problems such that irregularity in lateral direction (skew) and irregularity in vertical direction (coplanarity) of the leads 11 of the TCP which is not mounted yet are apt to be generated. If these skew and coplanarity become worse, at the time of mounting to the board 21, it becomes difficult to position each lead 11 onto the corresponding land 22 of the board 21, and defective connection is apt to be generated owing to floating foot after soldering.
Moreover, the TCP mounting method has had problems such that if some substance touches the film tape 10 of the mounted TCP 13, the lead 11 is deformed and, in a severe case, it may be cut.
On the other hand, F/C mounting method has had the problems such that the soldered portions (the bump 25 and the land 27) are hidden under the IC chip 1 as can be seen in FIGS. 4A to 4C, because the IC chip 1 is mounted on the board 26 by face-down, as a result visual inspection is difficult.
Besides, the F/C mounting method has had problems such that insurance of reliability in heat-cycle is difficult because of stress, which is generated owing to the difference between the thermal expansion coefficients of the IC chip 1 and the board 26, is centralized in the bump 25. Therefore stress is usually dissipated by sealing the gap between the IC chip 1 and the board 26 with sealing resin 29, however it is difficult to select the resin and a high degree of sealing technique is required, owing to the fact that the gap 28 between the IC chip 1 and the board 26 is 50 to 100 .mu.m. Additionally, the F/C mounting method has had the problem such that the normal radiation property is poor because the circuit side 1A of the IC chip 1 which generates heat is opposed to the board 26.
Besides, in the case of the LCCC 30 and the PLCC 31 (FIGS. 5A and 5B) there has been the problem that the size becomes larger than that of the IC chip itself because of using the carrier 33 which has been made from ceramics or plastics (especially, in the case of the PLCC 30, it becomes much larger than the case of the LCCC 31, because it is sealed with molding material), so that they are disadvantageous to high-density mounting.